What is wire bonding?

Wire Bonding: An Analysis of the Core Technology of Microelectronic Interconnects

In the microcosm of semiconductor packaging, wire bonding technology is like a sophisticated "circuit architect", using metal wires with a diameter of only 18-50μm (equivalent to 1/5 to 1/2 the diameter of a hair) to build a "micro bridge" between the chip and the substrate. This technology uses the synergy of heat, pressure, and ultrasonic energy to achieve atomic-scale tight bonding between metal leads and substrate pads – under ideal conditions, the atoms on the surface of the lead and pad will share or diffuse electrons to form a stable metal bond connection with a contact resistance of less than 5mΩ. From smartphone processors to spacecraft control systems, wire bonding supports the normal operation of modern electronic devices with its unique cost-effective advantages.

1. The pattern of packaging interconnect technology: the dominance of wire bonding

The internal connection technology in semiconductor packaging is like a city's transportation network, determining the transmission efficiency of electrical signals and power sources. There are currently three main connection methods, and wire bonding dominates due to its balanced performance and cost advantages. The characteristic game of the three major interconnection technologies clearly shows the market pattern. Flip Chip Bonding is like a "highway network", through the solder ball array on the bottom of the chip to achieve surface array connection, the interconnect density can reach 10,000 /mm², and the signal transmission delay < 10ps, but its process cost is 5-10 times that of wire bonding, and it is only used in high-end processors and other scenarios that require extreme performance. Automatic carrier tape soldering (TAB) is like a "special track", which is connected through metal bumps on the flexible carrier tape, which is suitable for long lead (>5mm) scenarios, but the flexibility is poor. Wire bonding is like a "flexible street network" that meets the performance requirements of more than 90% of electronic devices at 1/10th the cost, although the interconnect density (<500 per mm²) and transfer speed are not as fast as flip solder. According to data from a market research institution, in 2024, the application of wire bonding in global semiconductor packaging will still account for 91%, flip soldering is only 8%, and TAB technology is less than 1%. The balance between cost and performance has made the art of wire bonding popular. For most consumer electronics and industrial equipment, the 100MHz-1GHz signal transmission capability and 0.1-1W power carrying range provided by wire bonding are fully met, while the cost of a single-chip package can be controlled at $0.5-5, which is much lower than the $10-50 of flip-soldering. According to the calculations of a smartphone manufacturer, the chip packaging cost of each mobile phone can be reduced by $12 by using wire bonding instead of flip soldering, and the annual cost savings of 100 million units will be calculated as $1.2 billion. This cost advantage is also significant in automotive electronics – automotive-grade MCUs can meet the 15-year/300,000-kilometer service life requirement at 1/3 the cost of flip-bonded packaging in lead-bonded packages.

Extensive coverage of technology compatibility expands application boundaries. Wire bonding is compatible with a variety of chip materials such as silicon, gallium arsenide, gallium nitride, etc., and supports different carriers such as ceramics, organic substrates, metal lead frames, etc., this flexibility allows it to work reliably in extreme scenarios from aerospace environments at -55°C to automotive engine compartments at 150°C. In contrast, flip soldering requires extremely high substrate flatness (warpage needs to be <5 μm) and cleanliness, and the application scenarios are limited. The practice of a power semiconductor manufacturer shows that the use of wire bonding technology has expanded the application scenarios of its IGBT modules by 40% and reduced manufacturing costs by 25%.

2. The process of wire bonding: precision operation at the microscopic scale

The process of wire bonding is like "embroidery" at the nanoscale, with each step requiring sub-micron precision control, from wire preparation to final wire breakage, forming a complex system that is interlocked.

Micron-level control of wire preparation and positioning is the starting point of the process. Once the lead frame is transferred from the magazine to the table, the high-resolution vision system (with an accuracy of ±0.5μm) immediately initiates the positioning program – calculating the exact coordinates of each pad by identifying the alignment mark on the chip and the reference point of the lead frame, with a positioning time < 10ms. For 12mm×12mm chips, the system needs to position more than 100 pads in 0.1 seconds, ensuring a positional error of < 1μm for subsequent bonds. Equipment data from an advanced packaging plant shows that for every 0.1μm improvement in positioning accuracy, the bond yield can be improved by 0.5 percentage points.

The formation process of the first bond is like microscopic welding. In the case of wire bonding, for example, the system first sinters the end of the wire into a gold ball with a diameter of 2.5-3 times the diameter of the wire (roundness deviation <5%) through electrical sparks (voltage 1000-3000V), a process called "ball bonding". The splitter then descends to the chip pad with the gold ball, and under the synergistic action of heat (150-300°C), pressure (0.5-1.5N) and ultrasonic waves (20-60kHz), the gold ball undergoes plastic deformation (deformation rate 30-50%), forming a solder joint with a diameter of 3-4 times the wire diameter with the pad. The shear strength of a high-quality first solder joint should be > 15g (25μm wire diameter), and the damage depth of the aluminum layer of the pad should be < 0.5μm to avoid leakage caused by exposing the silicon substrate. The path optimization formed by the lead arc determines the connection reliability. After completing the first solder joint, the splitter rises and moves to the second solder joint according to a preset trajectory, forming a wire arc with a height of 100-300μm. The arc shape is achieved through dynamic control of tension and movement speed – the rise phase (0.1mm height) is slower (5mm/s) to avoid lead breakage, and the horizontal movement speed can be increased to 20mm/s for efficiency. The radius of curvature of the arc needs to be 10-20 times the diameter of the wire (25μm wire diameter corresponds to 250-500μm radius), which is too small and can lead to stress concentration (50% reduction in fatigue life), and too large may interfere with adjacent leads. In high-density packages, adjacent leads are spaced only twice the wire diameter (50μm wire diameter corresponds to 100μm pitch), and the consistency of line arc height (deviation <3μm) is a key quality metric.

The reinforced connection of the second bond ensures mechanical strength. The second solder joint (lead frame side) is wedge bonded, and the process parameters are different from the first solder joint: the pressure is increased by 20-30% (1-2N), the ultrasonic time is extended to 50-100ms, resulting in greater plastic deformation (40-60%) of the lead, resulting in a wedge solder joint with a width of 2-3 times the wire diameter. This design results in a 2nd solder joint with a 30% higher tensile strength than the first solder joint, allowing it to better withstand the mechanical stress of the package. In power devices, the pad area of the second solder joint is typically 5-10 times that of the first solder joint to reduce the current density (controlled below 5A/mm²) and avoid electromigration failure. Tests of an IGBT module showed that the optimized design of the second solder joint increased its current carrying capacity from 10A to 15A and reduced the temperature rise by 8°C. The fine processing of the wire break operation ensures the subsequent quality. After completing the second solder joint, the splitter moves vertically upwards (speed 5mm/s), applying a pulling force of 50-100cN to cut off the lead, and the length of the remaining lead tail should be controlled at 5-15μm (too long may cause a short circuit with adjacent leads, too short may affect the next bond). By designing a micro-tooth structure at the edge of the splitter, the consistency of the break position can be increased to ±2μm, and an improvement in the practice of a packaging factory has shown that this improvement reduces the lead short-circuit failure rate from 0.3% to 0.05%.

3. The characteristic game of bonding materials: from gold wire to silver alloy wire

The selection of lead materials is like choosing a "special cable" for a miniature circuit, requiring a delicate balance between conductivity, reliability, and cost, and the differences in the properties of different materials determine their applicability in different application scenarios.

(1) Comparison of the performance of mainstream bonding materials

Gold Wire: The "gold standard" for microelectronic interconnects. The 99.99% pure gold wire has an ultra-low resistivity of 1.587×10⁻⁸Ω m, stable chemical inertness below 200°C, and a bonding yield of more than 99.5%. By adding 0.05% palladium, the sulfur resistance of gold wire can be increased by 3 times, and its life in humid environments can be extended to more than 10 years. But its biggest drawback is the cost – the price of 400 yuan per gram makes the gold wire account for more than 60% of the cost of the entire bonding process. In LED packages, the high reflectivity of gold wire (95%) contributes to the efficiency of light output, but in power devices, its current-carrying capacity (<5A/mm²) is relatively limited.

Aluminum wire: an economical choice for power devices. The 99.5% pure aluminum wire with 1% silicon enhanced strength costs only 1/20 of the gold wire and forms a homogeneous connection with the chip's aluminum pad, avoiding the problem of intermetallic compounds. It can reach a diameter of 500μm and can transmit large currents of more than 10A, making it suitable for power modules such as IGBTs. However, aluminum wire has poor oxidation resistance (5nm oxide layer in 1 hour in air), bonding yield is typically 95-97%, and low fatigue strength (only 60% of gold wire), making it unreliable in vibrating environments. Tests of a new energy vehicle inverter showed that the failure probability of aluminum wire bonding after 1,000 power cycles was 3 times that of gold wire.

Copper wire: an alternative to cost-sensitive products. The resistivity of copper wire (1.67×10⁻⁸Ω m) is slightly lower than that of gold wire, the cost is only 1/5 of it, and the mechanical strength (tensile strength of 350MPa) is twice that of gold wire. However, the oxidation problem of copper wire (forming CuO and Cu₂O) requires bonding under nitrogen protection (oxygen concentration <10ppm), increasing equipment costs. Its high hardness (HV 120) can easily damage the aluminum pad during the bonding process, leading to an increased risk of chip leakage. In low-to-mid-range consumer electronics, copper wire bonding can reduce costs by 40%, but in high-frequency scenarios (>5GHz), the skin effect results in losses that are 15% higher than gold wire.

Silver alloy wire: a cost-effective choice for the mid-to-high-end market. The resistivity (1.62×10⁻⁸Ω・m) of silver alloy wire (such as AG88/PD12) is slightly higher than silver and lower than gold, and the price is 1/3-1/2 of that of gold wire. In LED applications, its 90% visible reflectivity can increase luminous flux by 10%; In power devices, current resistance (10A/mm²) is better than gold and copper. Silver alloy wire can be stored for 6-12 months (without sealing) and is easier to manage than copper wire (vacuum packed for 3 months). However, silver's migration (dendrite at 85% humidity and 5V bias for 1000 hours) limits its use in high-humidity environments and requires use with anti-migration coatings.

(2) Collaborative selection of lead frame materials

The material properties of the lead frame act as the "base" for bonding, and their material properties directly affect heat dissipation and mechanical support. Copper alloys (such as C19400) occupy more than 80% of the market share, with a high thermal conductivity of 401W/m・K and a tensile strength of 380MPa, suitable for most general-purpose scenarios; The thermal expansion coefficient (6.5ppm/°C) of nickel-iron alloy (42% Ni) is close to that of silicon chips, which can reduce thermal stress and is widely used in aerospace electronics. Composite metals (such as Cu/Ni/Au) are optimized by plating to maintain both the thermal conductivity of copper and the oxidation resistance of gold, making them excellent in high-frequency devices. Tests of an RF front-end module showed that the temperature of the bond point was reduced by 10°C compared to the copper alloy frame and the signal transmission efficiency was increased by 5% after using a composite metal lead frame.

4. Micro design of bonding tools: technical details of capillary tubes

In the wire bonding process, the capillary tube (microtubule) is the final link in the contact between the metal wire and the chip, and its tip design directly affects the energy transfer and bonding quality, which can be called the "precision tip" of the bonding machine. The material and structural properties of capillaries determine their service life. Capillary tubes made of zirconia ceramic (ZrO₂) or tungsten carbide (WC) can withstand more than one million bonding operations with hardness of HV 1500 or more. The inner diameter needs to be exactly matched to the lead diameter (typically 5-10% larger than the wire diameter), for example, 18μm gold wire corresponds to 20μm inner diameter, and a deviation of more than 1μm will result in inaccurate lead positioning. The radius of curvature (R) design of the tip is particularly critical – the R-value is 15-50μm for capillaries for ball welding and 5-15μm for wedge welding, which directly affects the shape consistency of the solder joint. The performance game of GM and P surfaces has its own focus. The tip surface roughness of the GM capillary tube is Ra=0.5-1μm, which can transmit vibration energy more efficiently (energy loss <5%) during ultrasonic bonding, increasing the bonding strength by 10%, but easily adsorbing pollutants in the air (mainly organic volatiles), and shortening the service life to 500,000 times. The P-type surface is polished to Ra<0.1 μm, which reduces contaminant adhesion by 70% and extends the service life to 1 million cycles, but results in a 15% increase in ultrasonic energy loss and requires a 10% increase in ultrasonic power compensation. In high-precision scenarios (such as sensor packaging), the cleaning advantages of P-type capillaries are more prominent. In power bonding, the energy transfer efficiency of GM type is more favored. Fine control of tip angle accommodates different pads. The front end angle (θ) of the capillary is usually designed to be 30°-60°, and the small angle (30°) is suitable for fine-pitch (<50μm) bonding, which can reduce interference with adjacent leads; The large angle (60°) is suitable for thick wire diameter (>50μm) bonding, which provides a larger pressure distribution area. Optimizing the angle parameters through finite element analysis can increase the uniformity of the stress distribution at the bond point by 30%, and tests of a MEMS accelerometer show that the probability of failure of the bond point in vibration testing is reduced from 8% to 1% when the capillary with the optimized angle is used.

5. Technical characteristics of bonding methods: synergy between heat, force and ultrasound

The three main methods of wire bonding – hot compression welding, ultrasonic welding and thermoacoustic welding – meet diverse application needs through different energy combination strategies, with the core difference being the energy input method and intensity.

(1) Thermocompression Bonding: a traditional solution of high temperature and high pressure

The process principle of hot press welding is like "micro forging", at a high temperature of 200-400°C, a pressure of 0.5-1.5N is applied through the splitting knife, so that the lead and the surface of the pad are plastically deformed and reach the atomic spacing (<0.5nm), forming a metal bond connection. This method has bond strengths of up to 0.05-0.09N (25μm wire diameter) and is suitable for low-frequency scenarios (<100MHz) where strength is not required.

The dual effects of high temperatures need to be carefully balanced. Although the chip temperature of 330-350°C can promote atomic diffusion, it will lead to the formation of excessive intermetallic compounds (AuAl₂, Au₂Al) at the gold-aluminum interface  etc.), these brittle phases are prone to cracking during temperature cycling. A reliability test showed that after 1000 hours of aging at 150°C, the contact resistance increased from the initial 5mΩ to 50mΩ, and the bond strength decreased by 40%. Therefore, hot press welding is currently only used in some low-end consumer electronics (such as toy chips), accounting for less than 5%.

(2) Ultrasonic Bonding: A low-temperature scheme for room temperature connection

Ultrasonic welding frees itself from the dependence on high temperatures and uses ultrasonic vibration at room temperature (25±5°C) at room temperature (255°C) through ultrasonic vibration at 20-60kHz, combined with a pressure of <0.5N, causing high-frequency friction (amplitude 1-5μm) between the lead and the pad surface. This vibration energy effectively breaks up the oxide layer (5-10nm thick), exposing the fresh metal surface, and bonding under the action of local plastic deformation with a strength of up to 0.07N, which is slightly higher than hot press welding. The significant embodiment of the advantages of low temperature expands the application boundaries. The room-temperature process avoids thermal damage to the chip from high temperatures, making it particularly suitable for CMOS devices (high temperatures can cause threshold voltage drift) and organic substrates (Tg<200°C). In flexible electronic packaging, ultrasonic soldering keeps the warpage of the PI substrate within 50μm, which is much lower than the 150μm of thermocompression soldering. However, its shortcomings are long bonding time (50-200ms), production efficiency is only 60% of that of hot press welding, and higher requirements for pad surface flatness (roughness needs to be < 0.1μm).

(3) Thermosonic Bonding: the mainstream scheme for collaborative optimization

Thermal acoustic welding combines the advantages of heat and ultrasound, and in a medium temperature environment of 125-300°C, through the synergistic effect of 0.5N pressure and ultrasound, the strength can reach 0.09-0.1N, which is the most balanced choice among the three methods, accounting for more than 90% of the market share. The multiple benefits of temperature reduction significantly improve reliability. The chip temperature was reduced from 350°C for hot press soldering to 200°C, which reduced the growth rate of gold-aluminum compounds by 60%, and the contact resistance growth after 1000 hours of aging at 150°C was controlled within 10%. The medium-temperature environment also reduces the thermal distortion of the chip (from 5μm to 1μm), enabling fine-pitch (<50μm) bonding. Tests of an automotive-grade MCU showed that after thermoacoustic soldering, the probability of bond failure was only 0.1% over 3,000 temperature cycles from -40°C to 125°C, which is much lower than the 1% of hot press welding.